Multimedia Processor
An independent processing core to accelerate 3D graphics operations becomes essential for real-time rendering of various 3D graphics applications such as 3D animations, movies, games, and user interfaces. Recently, overwhelming needs of embedded 3D graphics systems like mobile phones, mobile game engines, car navigation systems are highly expected. MVLSI Multimedia Processor group studies the VLSI implementation of 3D graphics accelerator. We research more efficient hardware architectures for memory throughput improvement and higher data-path utilization. We also concentrate on 3D graphics algorithms such as texture mapping, depth test, and anti-aliasing based on our in-house C++-based simulation tool, GATE (Graphics Architecture Testing Environment). From now on, MVLSI Multimedia Processor group is interested in embedded processor design for various multimedia applications including 3D graphics, 3D vision, and Augmented Reality.
Interface Circuit
Recently, as an enormous effort on transferring multimedia data faster increases, the demand of fast serial link transceiver design becomes higher. Although SiGe or BiCMOS processes are previously used for the optical transceiver designs, CMOS-based multi-dozen GHz transceiver leads the future waves due to the price and power efficiency. Furthermore, technologies about XDR (eXtreme Data Rate) and DDR3 (Double Data Rate 3) which maximize the data bandwidth between CPU and memory, and technologies about PCI Express Bus which minimizes the bottleneck effects between the graphic card and the main board become more popular. Since these technologies are wholly based on highly fast CMOS serial link transceiver design, Interface Circuit group researches on circuit blocks to transmit signals faster with lower power / higher performance, especially, Clock & Data Recovery (CDR) circuit, Phase Locked Loop (PLL), Delay Locked Loop (DLL), High-Speed logic styles, Low-Power circuit techniques.