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정보통신

mixed signal integrated circuits lab.

The Mixed-Signal Integrated Circuits Laboratory (MSICL) is working on CMOS analog and mixed-mode circuit designs including data converters, amplifiers, filters, display drivers, and etc. Especially, performance enhancing design techniques for data converters have mainly been researched as follows: energy efficient A/D conversion algorithm, low-power high-speed data converter architecture and related peripheral building blocks such as reference drivers and regulators, and switching noise tolerant design methods.
A simple digital error correction technique for high-speed binary weighted SAR ADCs with no hardware overhead has been developed [1].Inspired by the pipelined ADCs, decision error by the incomplete DAC settling in coarse conversion step is corrected in digital domain owing to the comparator offset and the proposed redundant decision cycles. This relaxes the requirement of the reference voltage settling accuracy and, therefore, enhances the conversion speed (1.4 times faster compared with the conventional SAR conversion for 10bit design).
Time-domain noise isolation technique has been proposed for mixed-signal circuits in which a single power/ground port must be shared by analog and digital circuits [2]. The proposed method removes supply regulator and makes low voltage design easier. The technique has been implemented in a sigma-delta ADC for digital microphone application, and its significant effectiveness has been proved by both circuit simulation and chip measurement. In addition, new high conversion-rate ADC architectures such as time-interleaved flash-SAR architecture [4] and time-domain interpolating flash ADC are currently being investigated in MSICL


국가

대한민국

소속기관

한국과학기술원 (학교)

연락처

책임자

류승탁 syryu@ee.kaist.ac.kr

소속회원 0