Research Field: Ge-based MOSFET
Background
As the conventional planar MOSFET has been scaled down to sub-20nm scale, Si-based technology faced limitation for improving device performance because strain engineering cannot provide sufficient improvement for mobility. Many suggestions were followed such as 3-D structure MOSFET, GaAs compound substrate and Ge substrate, Among those. Ge MOSFET can be one of the promising candidates for high performance logic transistors because of its intrinsically high mobility than that of Silicon. However, there are many obstacles in fabricating high performance Ge-based MOSFET such as a passivation layer for better interface quality, higher source/drain series resistance, and large leakage current due to its relatively narrow band-gap
Current Major Research Trend
(1) Effective cleaning method : Wet chemical treatment, Plasma treatment, thermal treatment
(2) High quality interface : GeO2 with High Pressure Oxidation, GeON passivation layer, SiO2 passivation layer, Direct High-k deposition with rare-earth oxide.
(3) Reduction of parasitic series resistance : Germanide, highly doped shallow S/D junction
Our Research Items
(1) Passivation layer : Direct High-k / Ge for Low EOT
(2) Germanide formation
(3) Highly doped S/D shallow junction formatio
국가
대한민국
소속기관
한국과학기술원 (학교)
연락처
042-350-7413 http://ndl.kaist.ac.kr/
책임자
이석희 seokheelee@ee.kaist.ac.kr