Device Modeling
Spin-torque transfer switching magnetic random access memory (STT-MRAM) have been focused as a promising memory device for the replacement of DRAM due to the scalability, performance and reliability.
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NAND FLASH Simulation
We study 3D NAND FLASH architecture simulation and 3D gate-all-around (GAA) device modeling to keep a trend of increasing bit density and reducing bit cost since 2D planar memories have been faced with several device scaling limits.
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Neuromorphic System
Our research team aims ultra low-power neuromorphic chip based on phase change in chalcogenide materials and develop architecture,using the 3D structure of known techniques,as well as synaptic, cell body to neurons to implement a completely full phase change memory process technology, the world’s first to develop the neural architecture and imitation chip.
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Logic Device
As mobile device market become enlarged, demands of application processor used in smartphone gradually increase. For these devices, miniaturization and low-power is essential to be suitable for mobile devices.
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Circuit Design
We study peripheral circuit for memory device to prevent read/write failure according to MOS Transistor noise and resistance distribution of MTJ device, and enhance memory device performance by securing sufficient sense margin during read operation and improving operation speed during read/write operation.
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국가
대한민국
소속기관
한양대학교 (학교)
연락처
02-2220-4135 http://isslab.hanyang.ac.kr
책임자
송윤흡 yhsong2008@hanyang.ac.kr